The formation of integrated circuit devices such as transistors requires the formation of diode junctions between semiconductor regions of opposite doping type. For example, the source and drain regions of a typical MOS transistor are formed by diffusing a dopant of one conductivity type into a substrate of opposite conductivity type. These source/drain regions are separated by a gate material, typically polysilicon, residing on a thin gate dielectric. When an appropriate voltage is placed on the gate, current can flow between the source and drain of the MOSFET. To reduce the series resistance of the source/drain regions in this current path, a silicide cladding is typically used. Since the silicide formation consumes part of the source/drain region, the source/drain function must be deep enough to prevent spiking of the silicide through the junction, since this would cause junction leakage and lower transistor performance. Deeper junctions in turn also lead to lower transistor performance due to parasitic capacitance and inhibited scalability of the gate length. Thus, a tradeoff must normally be made between junction depth and silicide thickness, since shallower junctions are incompatible with thicker silicide layers.
Heretofore, attempts to form shallow junctions with a thick silicide cover have been less than satisfactory. One such method is referred to as ion-implantation through metal (ITM). In ITM, a metal layer is applied to the silicon surface which will be subsequently doped. Ion-implantation is then conducted through the metal and into the silicon to form the doped region. Silicide is then formed over the doped region by a standard annealing process such as a furnace anneal or a rapid thermal anneal. Unfortunately, to meet the dual objectives of a shallow junction and a thick silicide layer, metal must be deposited to a typical thickness of at least 1,000 Angstroms. Implanting a dopant through a metal layer of 1,000 Angstroms requires high implant energy which can damage the surface of the metal layer and create defects (spiking) by driving some of the metal atoms into the silicon substrate.
An alternative to ITM is to first form the silicide over the region to be doped and then implant the impurities into the silicide as close to the silicon as possible. A subsequent drive-in annealing process is used to diffuse the impurities from the silicide layer into the silicon substrate to form the doped regions and to form shallow junctions. This method has some of the same inadequacies as the ITM method described above and more. Now rather than a fairly thick layer of metal to implant through, there is an increased depth due to the formation of the silicide. Additionally, the high implant energy required increases the likelihood of the impurities spreading out into the silicon more than desired, due to increased implant straggle at high implant energies. Thus, there is a need for a method to form a shallow junction with a relatively thick layer of silicide thereover having low sheet resistivity without surface damage or implant straggle.
Another alternative to ITM is to apply a metal layer to the silicon surface which is to be doped and subsequently to implant dopants into the metal rather than through the metal. However, the use of a thick metal layer to meet the objective of a low resistivity silicide layer still requires high implant energy at which to implant dopants. The high implant energy also needed for these methods again leads to creation of defects by reasons described previously.